JTAG Port: Difference between revisions
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TDO will have to be identified by impedence / voltage level testing. | TDO will have to be identified by impedence / voltage level testing. | ||
TCK: Burst Clock for period of test | TCK: Burst Clock for period of test | ||
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The '00000000' of TMS forces the TDI in, and the Current Instruction Out | The '00000000' of TMS forces the TDI in, and the Current Instruction Out | ||
If the inputs pins are connected incorrectly | If the inputs pins are connected incorrectly, the worst that can happen is '0' can be clocked into TMS twice, which should force the machine to stay in it's Run-Test/Idle state, and no damage can occur. | ||
If the input pins are connected correctly, some data should be seen on TDO. | If the input pins are connected correctly, some data should be seen on TDO as the instruction register last two bits are always '01'. | ||
Revision as of 00:48, 6 December 2006
Diagnostic
Presently, a possible location for the JTAG port has been identified, but which pin is which has not.
JTAG consists of 4 or 5 pins:
- TRST - A Reset line, which could be tied low via an R, permanently disabling the JTAG interface.
- TDI - Data In
- TDO - Data Out
- TMS - The Mode Select pin, which actually drives the JTAG TAP Controller around a simple state machine.
- TCK - Clock
And Is Driven by a State Machine
Pin identification without risk of re-programming
TDO will have to be identified by impedence / voltage level testing.
TCK: Burst Clock for period of test TDI: 000000000000000000 .... TMS: 011111011000000000 ...
TDI & TMS Change on TCK falling. The '11111' of TMS forces the state machine to reset The '01100' of TMS forces it into the Shift-IR state The '00000000' of TMS forces the TDI in, and the Current Instruction Out
If the inputs pins are connected incorrectly, the worst that can happen is '0' can be clocked into TMS twice, which should force the machine to stay in it's Run-Test/Idle state, and no damage can occur.
If the input pins are connected correctly, some data should be seen on TDO as the instruction register last two bits are always '01'.